DocumentCode :
624359
Title :
Private configuration environments (PCE) for efficient reconfiguration, in CGRAs
Author :
Tajammul, Muhammad Adeel ; Jafri, Syed Mohammad Asad Hassan ; Hemani, Ahmed ; Plosila, Juha ; Tenhunen, Hannu
Author_Institution :
R. Inst. of Technol., Stockholm, Sweden
fYear :
2013
fDate :
5-7 June 2013
Firstpage :
227
Lastpage :
236
Abstract :
In this paper, we propose a polymorphic configuration architecture, that can be tailored to efficiently support reconfiguration needs of the applications at runtime. Today, CGRAs host multiple applications, running simultaneously on a single platform. Novel CGRAs allow each application to exploit late binding and time sharing for enhancing the power and area efficiency. These features require frequent reconfigurations, making reconfiguration time a bottleneck for time critical applications. Existing solutions to this problem either employ powerful configuration architectures or hide configuration latency (using configuration caching). However, both these methods incur significant costs when designed for worst-case reconfiguration needs. As an alternative to worst-case dedicated configuration mechanism, we exploit reconfiguration to provide each application its private configuration environment (PCE). PCE relies on a morphable configuration infrastructure, a distributed memory sub-system, and a set of PCE controllers. The PCE controllers customize the morphable configuration infrastructure and reserve portion of the a distributed memory sub-system, to act as a context memory for each application, separately. Thereby, each application enjoys its own configuration environment which is optimal in terms of configuration speed, memory requirements and energy. Simulation results using representative applications (WLAN and Matrix Multiplication) showed that PCE offers up to 58% reduction in memory requirements, compared to dedicated, worst case configuration architecture. Synthesis results show that the morphable reconfiguration architecture incurs negligible overheads ( 3% area and 4% power compared of a single processing element).
Keywords :
cache storage; distributed memory systems; reconfigurable architectures; CGRA; PCE; WLAN; coarse grained reconfigurable architecture; configuration caching; configuration latency; distributed memory subsystem; matrix multiplication; morphable configuration infrastructure; morphable reconfiguration architecture; polymorphic configuration architecture; private configuration environment; representative application; time critical application; Context; Feeds; Memory management; Switches; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Systems, Architectures and Processors (ASAP), 2013 IEEE 24th International Conference on
Conference_Location :
Washington, DC
ISSN :
2160-0511
Print_ISBN :
978-1-4799-0494-5
Type :
conf
DOI :
10.1109/ASAP.2013.6567579
Filename :
6567579
Link To Document :
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