The design of 2.4GHz continuous time band-pass delta-sigma AD modulator

Author

Haijun Lin

Author_Institution

Xiamen Univ. of Technol., Xiamen, China

fYear

2013

fDate

5-8 May 2013

Firstpage

1

Lastpage

4

Abstract

This paper describes the design and analysis of a continuous-time band-pass delta-sigma AD modulator for RF sampling by use of sub-sampling technique and RF DAC technique. We determined the SNDR degradation due to finite Q value of the loop resonator, SNDR was improved by 20dB by use of proposed digital filter technique. This paper validates a transistor-level circuit design of a complete 4th order modulator by 0.18um CMOS process with the input signal frequency of 2.4GHz, sampling clock frequency of 3.2GHz.The peak SNDR is 56dB, power dissipation is 50mW with 1.8V supply.

Keywords

CMOS integrated circuits; band-pass filters; continuous time filters; delta-sigma modulation; digital filters; modulators; CMOS process; RF DAC technique; RF sampling; SNDR degradation; continuous time band-pass delta-sigma AD modulator; digital filter; frequency 2.4 GHz; power dissipation; sub-sampling technique; transistor-level circuit design; Band-pass filters; Digital filters; Frequency modulation; Radio frequency; Resonant frequency; Sigma-delta modulation; Continuous-time; RF DAC; RF sampling; Sub-sampling; delta-sigma modulator;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering (CCECE), 2013 26th Annual IEEE Canadian Conference on

Conference_Location

Regina, SK

ISSN

0840-7789

Print_ISBN

978-1-4799-0031-2

Electronic_ISBN

0840-7789

Type

conf

DOI

10.1109/CCECE.2013.6567808

Filename

6567808