Title :
High gain, low power, CMOS current reused LNA with noise optimization
Author :
Rezvani, Mohsen ; Ardalan, S. ; Raahemifar, Kaamran
Author_Institution :
Ryerson Univ., Toronto, ON, Canada
Abstract :
A low power, high gain, optimized CMOS low noise amplifier (LNA) is presented in this paper intended for Bluetooth applications. Employing CMOS Inverter as a core of the proposed LNA, the extra voltage gain within the lowpower consumption is obtained. By improving the previous works on CMOS LNA optimization, we attain a comprehensive and compatible method to optimize the fundamental features of the CMOS Inverter Current Reused (CICR) family. The provided CICR LNA results inclusively prove the advantages of our design over other published topologies. The designed LNA based on 0.13μm CMOS technology demonstrates a 28.5dB voltage gain (S21), 2.4dB noise figure (NF), -18dB impedance matching (S11), and dissipating power less than 1mW at 2.4GHz frequency.
Keywords :
CMOS integrated circuits; impedance matching; invertors; low noise amplifiers; Bluetooth application; CMOS LNA optimization; CMOS inverter current reused LNA; CMOS technology; impedance matching; noise figure; noise optimization; optimized CMOS low noise amplifier; voltage gain; CMOS integrated circuits; Inverters; Logic gates; Noise; Noise measurement; Optimization; Transistors; CMOS Inverter; Current Reused; Integrated Circuit; Low Noise Amplifier; Low Power; Noise Optimization;
Conference_Titel :
Electrical and Computer Engineering (CCECE), 2013 26th Annual IEEE Canadian Conference on
Conference_Location :
Regina, SK
Print_ISBN :
978-1-4799-0031-2
Electronic_ISBN :
0840-7789
DOI :
10.1109/CCECE.2013.6567811