• DocumentCode
    625478
  • Title

    A 0.5GHz–1.5GHz order scalable harmonic rejection mixer

  • Author

    Teng Yang ; Tripurari, Karthik ; Krishnaswamy, Harish ; Kinget, Peter R.

  • Author_Institution
    Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
  • fYear
    2013
  • fDate
    2-4 June 2013
  • Firstpage
    411
  • Lastpage
    414
  • Abstract
    In this paper, a harmonic rejection mixer architecture capable of operating for a wide range of LO frequencies is demonstrated. The mixer can be configured to suppress any particular harmonic of the LO or multiple harmonics simultaneously. The level of suppression of each harmonic is controlled by a set of independent gain and phase tuning parameters. Feasibility of extension of this concept to higher order harmonics is also demonstrated. A proof-of-principle prototype has been designed and fabricated in a 45nm SOI technology. Experimental results demonstrate an operation range of 0.5GHz to 1.5GHz for the LO frequency while offering harmonic rejection better than 55dB for the 3rd harmonic and 58dB for the 5th harmonic across LO frequencies. The mixer consumes 17mW of power from a 1V power supply while occupying an area of 0.352mm2.
  • Keywords
    UHF mixers; harmonics suppression; silicon-on-insulator; LO frequencies; SOI technology; Si; frequency 0.5 GHz to 1.5 GHz; harmonic suppression; independent gain set; order scalable harmonic rejection mixer; phase tuning parameters; power 17 mW; size 45 nm; voltage 1 V; Cognitive radio; Frequency measurement; Harmonic analysis; Interference; Mixers; Transconductance; Tuning; Harmonic rejection mixer; cognitive radio;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radio Frequency Integrated Circuits Symposium (RFIC), 2013 IEEE
  • Conference_Location
    Seattle, WA
  • ISSN
    1529-2517
  • Print_ISBN
    978-1-4673-6059-3
  • Type

    conf

  • DOI
    10.1109/RFIC.2013.6569618
  • Filename
    6569618