DocumentCode
625611
Title
HQL: A Scalable Synchronization Mechanism for GPUs
Author
Yilmazer, Ayse ; Kaeli, David
Author_Institution
Electr. & Comput. Eng. Dept., Northeastern Univ., Boston, MA, USA
fYear
2013
fDate
20-24 May 2013
Firstpage
475
Lastpage
486
Abstract
Modern GPUs rely on atomic operations to perform global communication. These atomic operations can be used to construct finer-grained locks to provide support for mutual exclusion. However, equipped with only these basic synchronization primitives to support mutual exclusion results in inefficient use of resources. In this paper, we propose a new hardware-based blocking synchronization mechanism which uses hierarchical queuing for scalability and efficiency. We evaluate our design using a set of GPU applications for stressing synchronization mechanisms. We perform detailed simulation utilizing the Multi2Sim heterogeneous simulation infrastructure. Our results indicate that we can reduce the number of instructions executed by a GPU application by as much as 84%, while improving execution performance by as much as 73%.
Keywords
graphics processing units; queueing theory; GPU; HQL; Multi2Sim heterogeneous simulation; atomic operation; global communication; hardware-based blocking synchronization; hierarchical queuing; scalable synchronization mechanism; Bandwidth; Computer architecture; Graphics processing units; Hardware; Instruction sets; Scalability; Synchronization; GPUs; Mutual-exclusion; synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel & Distributed Processing (IPDPS), 2013 IEEE 27th International Symposium on
Conference_Location
Boston, MA
ISSN
1530-2075
Print_ISBN
978-1-4673-6066-1
Type
conf
DOI
10.1109/IPDPS.2013.82
Filename
6569835
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