A frequency-folded ADC architecture with digital LO synthesis

An analog-to-digital converter (ADC) architecture is described which utilizes mixing instead of high frequency sampling, and folds the input in frequency around harmonics of the mixing local oscillator. The frequency-folded input is separated in the digital domain, which enables significant dynamic range benefits. The frequency of the mixing local oscillator can be significantly smaller than the signal bandwidth, and hence the architecture is suitable for high-speed applications. The architecture is verified through system level simulation and the impact of non-idealities on performance is considered. The design is observed to have a reduced timing skew requirement compared to time-interleaved ADCs.