• DocumentCode
    626531
  • Title

    Mitigating timing errors in time-interleaved ADCs: A signal conditioning approach

  • Author

    Ghosh, A. ; Pamarti, Sudhakar

  • Author_Institution
    Dept. of Electr. Eng., Univ. of California, Los Angeles, Los Angeles, CA, USA
  • fYear
    2013
  • fDate
    19-23 May 2013
  • Firstpage
    357
  • Lastpage
    360
  • Abstract
    Novel techniques based on signal-conditioning are presented to mitigate timing errors in time-interleaved ADCs. A theoretical bound on the achievable spurious signal content, on applying the techniques, is also derived. Behavioral simulations corroborating the same are presented.
  • Keywords
    analogue-digital conversion; circuit simulation; signal conditioning circuits; signal conditioning approach; spurious signal content; time-interleaved ADC; timing error mitigation; Circuits and systems; Clocks; Delta-sigma modulation; Dynamic range; Passband; Signal resolution; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
  • Conference_Location
    Beijing
  • ISSN
    0271-4302
  • Print_ISBN
    978-1-4673-5760-9
  • Type

    conf

  • DOI
    10.1109/ISCAS.2013.6571854
  • Filename
    6571854
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=626531