DocumentCode
626723
Title
A 3.4dB NF k-band LNA in 65nm CMOS technology
Author
Jianfei Xu ; Na Yan ; Qiang Chen ; Jianjun Gao ; Xiaoyang Zeng
Author_Institution
ASIC & Syst. State Key Lab., Fudan Univ. Shanghai, Shanghai, China
fYear
2013
fDate
19-23 May 2013
Firstpage
1123
Lastpage
1126
Abstract
This paper presents a k-band (18-26.5 GHz) high gain low noise amplifier (LNA) in 65-nm CMOS mixed signal process. The LNA has a peak gain of 20.46 dB at 22.45 GHz and a -3 dB bandwidth of 3.8 GHz. S11 of the chip is better than -11 dB and S22 better than -15 dB across the band. The measured smallest noise figure (NF) is 3.4 dB. The whole chip consumes 11mA current under 1.1V supply voltage and occupies an area of 710 μm × 540 μm.
Keywords
CMOS analogue integrated circuits; MMIC amplifiers; field effect MMIC; low noise amplifiers; mixed analogue-digital integrated circuits; CMOS mixed signal process; CMOS technology; bandwidth 3 GHz; current 11 mA; frequency 18 GHz to 26.5 GHz; gain 20.46 dB; k-band high-gain LNA; noise figure 3.4 dB; size 65 nm; voltage 1.1 V; CMOS integrated circuits; Inductors; K-band; Noise; Noise measurement; Semiconductor device measurement; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location
Beijing
ISSN
0271-4302
Print_ISBN
978-1-4673-5760-9
Type
conf
DOI
10.1109/ISCAS.2013.6572048
Filename
6572048
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