Designing scratchpad memory architecture with emerging STT-RAM memory technologies

Author

Peng Wang ; Guangyu Sun ; Tao Wang ; Yuan Xie ; Cong, J.

Author_Institution

Center for Energy-Efficient Comput. & Applic., Peking Univ., Beijing, China

fYear

2013

fDate

19-23 May 2013

Firstpage

1244

Lastpage

1247

Abstract

Scratchpad memories (SPMs) have been widely used in embedded systems to achieve comparable performance with better energy efficiency when compared to caches. Spin-transfer torque RAM (STT-RAM) is an emerging nonvolatile memory technology that has low-power and high-density advantages over SRAM. In this study we explore and evaluate a series of scratchpad memory architectures consisting of STT-RAM. The experimental results reveal that with optimized design, STT-RAM is an effective alternative to SRAM for scratchpad memory in low-power embedded systems.

Keywords

SRAM chips; embedded systems; integrated circuit design; low-power electronics; SPM; STT-RAM memory technologies; low-power embedded systems; nonvolatile memory technology; optimized design; scratchpad memory architecture; spin-transfer torque RAM; Computer architecture; Embedded systems; Energy consumption; Optimized production technology; Phase change random access memory; Resource management;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2013 IEEE International Symposium on

Conference_Location

Beijing

ISSN

0271-4302

Print_ISBN

978-1-4673-5760-9

Type

conf

DOI

10.1109/ISCAS.2013.6572078

Filename

6572078