DocumentCode :
626793
Title :
A 52 dBc MTPR line driver for powerline communication HomePlug AV standard in 0.18-μm CMOS technology
Author :
Pang-Kai Liu ; Szu-Yao Hung ; Chang-Yi Liu ; Min-Han Hsieh ; Chen, Charlie Chung-Ping
Author_Institution :
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2013
fDate :
19-23 May 2013
Firstpage :
1404
Lastpage :
1407
Abstract :
In this paper, a line driver for HomePlug AV powerline communication system has been described. The proposed line driver includes a damping factor control (DFC) network which suppressed the open loop high frequency peaking effect to improve the stability for the various characteristic impedance of powerline. The line driver was fabricated in TSMC 0.18-μm CMOS technology and occupied 0.195 mm2 active area. When operating with a power line and a coupling unit including a 1:4 turn ratio transformer, the line driver achieves 60 MHz bandwidth and 52.14 dBc in-band MTPR, with 5.15 dBm output signal power and 4.44 peak-to-average ratio (PAR), while 2.5 V supply voltage.
Keywords :
CMOS integrated circuits; carrier transmission on power lines; driver circuits; DFC network; MTPR line driver; PAR; TSMC CMOS technology; bandwidth 60 MHz; damping factor control network; open loop high frequency peaking effect; peak-to-average ratio; powerline communication HomePlug AV standard; size 0.18 mum; voltage 2.5 V; Bandwidth; CMOS integrated circuits; Damping; Impedance; Peak to average power ratio; Power measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location :
Beijing
ISSN :
0271-4302
Print_ISBN :
978-1-4673-5760-9
Type :
conf
DOI :
10.1109/ISCAS.2013.6572118
Filename :
6572118
Link To Document :
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