DocumentCode
626811
Title
An all-subthreshold, 0.75V supply, 2ppm/°C, CMOS Voltage Reference
Author
Andreou, Charalambos M. ; Georgiou, Julius
Author_Institution
Sch. of Electr. & Comput. Eng., Univ. of Cyprus, Nicosia, Cyprus
fYear
2013
fDate
19-23 May 2013
Firstpage
1476
Lastpage
1479
Abstract
An all-subthreshold CMOS Voltage Reference architecture is presented, which achieves 3rd order curvature compensation over a wide temperature range. The simulated performance of the proposed architecture with a supply voltage of 0.75V is 2 ppm/°C, over a temperature range of 190 °C (-45 °C to 145 °C). The high order curvature compensation is performed using the non-linearities of an NMOS device, operated in subthreshold, combined with the non-linearities of low-temperature-coefficient poly resistors and high-resistivity poly resistors. The topology achieves a power consumption of 2μW. The design does not require any external components.
Keywords
CMOS integrated circuits; MIS devices; resistors; NMOS device; all-subthreshold CMOS voltage reference architecture; high-resistivity polyresistors; low-temperature-coefficient polyresistors; power 0.2 muW; temperature -45 degC to 145 degC; temperature 190 degC; third order curvature compensation; voltage 0.75 V; CMOS integrated circuits; Performance evaluation; Photonic band gap; Resistors; Temperature distribution; Topology; Transistors; Curvature Compensation; High order non-linearity; Voltage Reference; sub-threshold CMOS;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location
Beijing
ISSN
0271-4302
Print_ISBN
978-1-4673-5760-9
Type
conf
DOI
10.1109/ISCAS.2013.6572136
Filename
6572136
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