Title :
An interface for the I2C protocol in the WaferBoard™
Author :
Hussain, Waqar ; Savaria, Yvon ; Blaquiere, Yves
Abstract :
This paper presents a circuit proposed for the DreamWaferTM technology. This circuit can interconnect several pads, also called NanoPads, in such a way that they can imitate the behavior of a single metal line for open-drain (or open-collector) buses compliant to the I2C protocol. Thus, multiple serial data lines (SDA) and serial clock lines (SCL) from different user ICs can be connected together on the WaferboardTM. The interface can support up to 25 I2C IC pins together. It can support bidirectional data transfers at up to 100 kbit/s in the Standard-mode, up to 400 kbit/s in the Fast-mode, up to 1 Mbit/s in the Fast-mode Plus, or up to 3.4 Mbit/s in the High-speed mode. The entire interface would take less than 1% of the total area of the WaferICTM, the target system environment for which this circuit is proposed.
Keywords :
integrated circuit interconnections; system buses; DreamWafer technology; I2C protocol; IC pins; NanoPads; SCL; SDA; WaferBoard; bidirectional data transfers; bidirectional multimaster serial bus; fast-mode plus; high-speed mode; multiple serial data lines; open-collector buses; open-drain buses; serial clock lines; single metal line; standard-mode; target system environment; user IC; Integrated circuit interconnections; Logic gates; MOS devices; Protocols; Registers; Sensors; Standards; Bidirectional Bus; I2C protocol; Open Collector Bus; Re-programmable Circuit Board;
Conference_Titel :
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location :
Beijing
Print_ISBN :
978-1-4673-5760-9
DOI :
10.1109/ISCAS.2013.6572140
