Title :
A rapid analog amendment framework using the incremental floorplanning technique
Author :
Sheng-Jhih Jiang ; Tsung-Yi Ho
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Abstract :
In modern analog design flow, to reduce the complexity of designing new circuits, designers usually reuse previous designed circuits for fast floorplan prototyping. If design amendment is required in the new circuits, several components will need to follow complicated constraints such as fixed location, fixed shape, or change shape from rectilinear to rectangular. It is difficult for designers to refine the floorplan manually because of the lack of automation tools for analog designs. Moreover, there is no previous work considering all the constraints simultaneously to overcome the amendment problem. Therefore, in this paper, we define four block types for modeling the block with different constraints in the amendment process. Then, we start the amendment process by extracting the component topology in the initial floorplan and then determining the target shapes of blocks which should be reshaped to rectangles for internal analog electrical features such as device matching. Finally, we eliminate the overlaps induced by above reshaping. If all the overlaps are eliminated, a new feasible floorplan is obtained. After applying our framework, a modified floorplan will be produced to fit the amendment. Experimental result shows that the proposed framework is very promising.
Keywords :
analogue integrated circuits; integrated circuit design; integrated circuit modelling; automation tools; block target shapes; component topology extraction; incremental floorplanning technique; initial floorplan; internal analog electrical features; modern analog design flow; overlap elimination; rapid analog amendment framework;
Conference_Titel :
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location :
Beijing
Print_ISBN :
978-1-4673-5760-9
DOI :
10.1109/ISCAS.2013.6572195