Title :
A high speed configurable FPGA architecture for k-mean clustering
Author :
Kutty, Jithin Sankar Sankaran ; Boussaid, Farid ; Amira, Abbes
Author_Institution :
Sch. of Electr. & Comput. Eng., Univ. of Western Australia, Perth, WA, Australia
Abstract :
This paper presents a high speed configurable FPGA architecture for k-means clustering. The proposed architecture is highly pipelined, parallel and fully configurable. It can achieve an operating frequency of 400 MHz, which is at least three times faster than prior works. The proposed architecture addresses the high speed and throughput requirements of machine vision, multi-media and data mining applications.
Keywords :
field programmable gate arrays; pattern clustering; data mining applications; field programmable gate arrays; frequency 400 MHz; high speed configurable FPGA architecture; k-mean clustering; machine vision applications; multimedia applications; throughput requirements; Algorithm design and analysis; Clocks; Clustering algorithms; Computer architecture; Digital signal processing; Field programmable gate arrays; Throughput;
Conference_Titel :
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location :
Beijing
Print_ISBN :
978-1-4673-5760-9
DOI :
10.1109/ISCAS.2013.6572215
