Low-power programmable charge-domain sampler with embedded N-path bandpass filter for software-defined radio

This paper proposes a charge-domain quadrature down-conversion sampling mixer with improved filter functionality. An 4-path bandpass filter and a quadrature sampling mixer are integrated in a cascode architecture to minimize power consumption while providing a degree of programmability. The proposed design is applicable to heterodyne receivers for suppressing aliasing signals, large out-of-band blockers, and IF images. It also offers partial channel selection. Designed in IBM 130 nm 1.2V CMOS technology, simulation results from Spectre of Cadence Design Systems with BSIM4 device models demonstrate that the proposed design exhibits aliasing rejection of 70 dB, stop band attenuation of 60 dB while consuming current of 104μ A.