Low-power and compact NP dynamic CMOS adder with 16nm carbon nanotube transistors

Author

Yanan Sun ; Kursun, V.

Author_Institution

Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China

fYear

2013

fDate

19-23 May 2013

Firstpage

2119

Lastpage

2122

Abstract

Low-power, compact, and high-performance NP dynamic CMOS circuits implemented with a 16nm carbon nanotube transistor technology are presented in this paper. The performances of two-stage pipeline 32-bit carry lookahead adders are evaluated with two circuit techniques: the carbon nanotube MOSFET (CN-MOSFET) domino logic and the CN-MOSFET NP dynamic CMOS. While providing similar propagation delay, the total area of CN-MOSFET NP dynamic CMOS circuit is reduced by 13.61% as compared to the CN-MOSFET domino adder. Miniaturization of the CN-MOSFET NP dynamic CMOS adder reduces the dynamic switching power consumption by 30.42% as compared to the CN-MOSFET domino circuit. Furthermore, the CN-MOSFET NP dynamic CMOS circuit provides 49.32% savings in leakage power consumption as compared to the CN-MOSFET domino adder.

Keywords

CMOS digital integrated circuits; MOSFET; adders; carbon nanotube field effect transistors; carbon nanotubes; carry logic; delay circuits; nanoparticles; C; CN-MOSFET; carbon nanotube MOSFET domino logic adder; carbon nanotube transistor technology; compact NP dynamic CMOS adder circuit; delay propagation; dynamic switching power consumption; leakage power consumption; low-power NP dynamic CMOS adder circuit; size 16 nm; two-stage pipeline carry lookahead adder; word length 32 bit; Adders; CMOS integrated circuits; CMOS technology; Carbon nanotubes; Logic gates; Propagation delay; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2013 IEEE International Symposium on

Conference_Location

Beijing

ISSN

0271-4302

Print_ISBN

978-1-4673-5760-9

Type

conf

DOI

10.1109/ISCAS.2013.6572292

Filename

6572292