• DocumentCode
    626979
  • Title

    The swapping binary-window DAC switching technique for SAR ADCs

  • Author

    Yung-Hui Chung

  • Author_Institution
    Dept. of Electron. & Comput. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei, Taiwan
  • fYear
    2013
  • fDate
    19-23 May 2013
  • Firstpage
    2231
  • Lastpage
    2234
  • Abstract
    The binary-window capacitor switching algorithm is proposed for a binary-weighted capacitor array successive approximation register (SAR) analog-to-digital converter (ADC). It eliminates the middle-code transition glitch to improve ADC linearity. The swapping binary-window (SBW) DAC switching technique, which combines the capacitor swapping and the binary-window switching, further improves both linearity and signal-to-noise ratio (SNR). It can effectively reduce the total capacitance to approach a noise-limited design criterion, achieving better energy-efficiency. The static linearity improvements are shown with the integral non-linearity (INL) reducing by a factor of two due to the utilization of the SBW technique.
  • Keywords
    analogue-digital conversion; approximation theory; capacitance; capacitors; digital-analogue conversion; INL; SAR ADC; SBW DAC switching technique; SNR; binary-weighted capacitor array successive approximation register analog-to-digital converter; binary-window capacitor switching algorithm; integral nonlinearity; middle-code transition glitch; noise-limited design criterion; signal-to-noise ratio; static linearity improvements; swapping binary-window DAC switching technique; Arrays; Capacitance; Capacitors; Linearity; Signal to noise ratio; Simulation; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
  • Conference_Location
    Beijing
  • ISSN
    0271-4302
  • Print_ISBN
    978-1-4673-5760-9
  • Type

    conf

  • DOI
    10.1109/ISCAS.2013.6572320
  • Filename
    6572320