Title :
SRAM device and cell co-design considerations in a 14nm SOI FinFET technology
Author :
Cheng, Binjie ; Wang, Xiongfei ; Brown, A.R. ; Kuang, Jente B. ; Reid, Dave ; Millar, C. ; Nassif, S. ; Asenov, Asen
Author_Institution :
Device Modelling Group, Univ. of Glasgow, Glasgow, UK
Abstract :
We report a systematic study on the impact of process and statistical variability on SRAM design in a 14nm SOI FinFET technology node. A comprehensive statistical compact modelling strategy is developed for the early delivery of reliable PDK model, which enables TCAD-based transistor-cell co-design and path finding during the early phase of a technology node.
Keywords :
MOSFET; SRAM chips; integrated circuit design; integrated circuit modelling; semiconductor device models; silicon-on-insulator; technology CAD (electronics); PDK model; SOI FinFET technology node; SRAM device-cell co-design consideration; TCAD-based transistor-cell co-design; comprehensive statistical compact modelling strategy; path finding; process variability; size 14 nm; statistical variability; FinFETs; Geometry; Integrated circuit modeling; Logic gates; SRAM cells;
Conference_Titel :
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location :
Beijing
Print_ISBN :
978-1-4673-5760-9
DOI :
10.1109/ISCAS.2013.6572347
