DocumentCode
627039
Title
Design optimisation of front-end neural interfaces for spike sorting systems
Author
Barsakcioglu, Deren Y. ; Eftekhar, Amir ; Constandinou, Timothy G.
Author_Institution
Dept. of Electr. & Electron. Eng., Imperial Coll. London, London, UK
fYear
2013
fDate
19-23 May 2013
Firstpage
2501
Lastpage
2504
Abstract
This work investigates the impact of the analogue front-end design (pre-amplifier, filter and converter) on spike sorting performance in neural interfaces. By examining key design parameters including the signal-to-noise ratio, bandwidth, filter type/order, data converter resolution and sampling rate, their sensitivity to spike sorting accuracy is assessed. This is applied to commonly used spike sorting methods such as template matching, 2nd derivative-features, and principle component analysis. The results reveal a near optimum set of parameters to increase performance given the hardware-constraints. Finally, the relative costs of these design parameters on resource efficiency (silicon area and power requirements) are quantified through reviewing the state-of-the-art.
Keywords
design engineering; neural nets; principal component analysis; sorting; analogue front end design; bandwidth; data converter resolution; design optimisation; front end neural interfaces; principle component analysis; resource efficiency; sampling rate; signal to noise ratio; spike sorting accuracy; spike sorting method; spike sorting performance; spike sorting system; template matching; Accuracy; Electrodes; Neurons; Principal component analysis; Signal to noise ratio; Sorting;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location
Beijing
ISSN
0271-4302
Print_ISBN
978-1-4673-5760-9
Type
conf
DOI
10.1109/ISCAS.2013.6572387
Filename
6572387
Link To Document