High performance scalable elliptic curve cryptosystem processor in GF(2m)

The implementation of a scalable elliptic curve cryptography (ECC) processor is presented in this paper. The proposed ECC processor supports all 5 pseudo-random curves recommended by the National Institute of Standards and Technology (NIST) without the need to reconfigure the FPGA. The paper proposes a finite field arithmetic unit (FFAU) that reduces the number of clock cycles required to compute the elliptic curve point multiplication (ECPM) operation for ECC. The paper also presents a Lopez-Dahab algorithm with modified instructions to take advantage of the novel FFAU architecture. The completed scalable ECC processor (ECP) is implemented in hardware and a comparison analysis to the state-of-the-art designs is also discussed.