Design considerations for supply modulated EER power amplifiers

Envelope elimination and restoration (EER)based transmitters provide increased spectral efficiency for modulation standards with large peak-to-average ratios. In contrast to an EER topology, increased spectral efficiency is traded off against decreased power-added-efficiency when a conventional linear power amplifier is used. Moreover, the advantage of scaled CMOS is exploited in the EER approach through the use of fast on-chip switching power amplifiers. Performance limitations associated with non-idealities in an EER system and its extensions (e.g., class-G) such as delay mismatches between the envelope (A) and phase (Φ) signal components, bandwidth limitations in the A and Φ paths, and glitches in the A signal path caused by switching between the dual-supply modulators, are examined.