Analytical comparison between passive loop filter topologies for frequency synthesizer PLLs

This paper presents an analytical and comparative study on the design of the loop filter in frequency synthesizer Phase Locked Loops (PLLs). Loop filter design involves the selection of topology, type, order, poles ratio, noise contribution, and loop stability. The trade-offs involved in the design are elucidated and analyzed. The detailed analysis and simulation in this paper facilitate the selection of the loop filter that results in the optimum performance. Components selection through mathematical derivation and filter design tables is demonstrated.