• DocumentCode
    628415
  • Title

    10μm Ag flip-chip by solid-state bonding at 250°C

  • Author

    Lin, W.P. ; Lee, C.C.

  • Author_Institution
    Electr. Eng. & Comput. Sci., Mater. & Manuf. Technol., Univ. of California, Irvine, Irvine, CA, USA
  • fYear
    2013
  • fDate
    28-31 May 2013
  • Firstpage
    431
  • Lastpage
    434
  • Abstract
    In this paper, 10μm Ag flip-chip interconnect joints by solid-state bonding was demonstrated between Si chips and Cu substrates. In experiments, an array of 125×125 Ag columns that had 10μm in diameter, 20μm in pitch and 10μm in height was fabricated in one chip region of Si wafers that were first metalized with Cr/Au. The process was performed using solid-state atomic bonding at 250°C with a static pressure of 800 psi (5.5 MPa) for 10 minutes in 0.1 torr vacuum. The corresponding load for each column was 0.044 gm. Cross section SEM images of one row of joints show that the Ag flip-chip joints were bonded to the Cu substrate without voids or breakage. Despite significant coefficient of thermal expansion (CTE) mismatch between Si and Cu, the Si chips did not break from Cu. There are several advantages compared to the popular Sn based Pb-free flip-chip technology: high electrical and thermal conductivities, no IMCs and related issues, no flux issue, high ductility for managing CTE mismatch between chips and packages, high operation temperature, and the possibility for high aspect ratio interconnect.
  • Keywords
    electrical conductivity; elemental semiconductors; flip-chip devices; integrated circuit interconnections; scanning electron microscopy; silicon; silver; thermal conductivity; Ag; CTE mismatch; Cr-Au; Cu; Si; cross section SEM images; electrical conductivities; flip-chip interconnect joints; high aspect ratio interconnect; pressure 800 psi; size 10 mum; solid-state bonding; temperature 250 degC; thermal conductivities; thermal expansion mismatch; time 10 min; Bonding; Flip-chip devices; Gold; Joints; Silicon; Substrates; Ag; electronic packaging; flip-chip; solid-state bonding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
  • Conference_Location
    Las Vegas, NV
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4799-0233-0
  • Type

    conf

  • DOI
    10.1109/ECTC.2013.6575607
  • Filename
    6575607