Key elements for sub-50μm pitch micro bump processes

The ever need for more dense 3D integration or increasing number of IOs requires a scaling down of micro bump dimension and pitch. Scaling although adds high requirements on micro bump process technology and stacking accuracy. It is shown that by working on the micro bump sizes, increased stacking accuracy can be achieved. Integration scheme and process parameters need to be carefully tuned to allow a stable Cu(Ni)Sn micro bumping process. Analysis of the micro bumps is done by shear tests.