Title :
Low temperature (<180°C) wafer-level and chip-level In-to-Cu and Cu-to-Cu bonding for 3D integration
Author :
Yu-San Chien ; Yan-Pin Huang ; Ruoh-Ning Tzeng ; Ming-Shaw Shy ; Teu-Hua Lin ; Kou-Hua Chen ; Ching-Te Chuang ; Wei Hwang ; Jin-Chern Chiou ; Chi-Tsung Chiu ; Ho-Ming Tong ; Kuan-Neng Chen
Author_Institution :
Dept. o Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
Two bonded structures, Cu/In bonding and Cu-Cu bonding with Ti passivation, were investigated for the application of 3D interconnects. For Cu/In bonding, the bonds were achieved at 170°C due to the isothermal solidification. The intermetallic compounds formed in the joint was Cu2In phase. For another case, Cu-Cu bonding with Ti passivation was successfully achieved at 180°C Application of Ti passivation can protect inner Cu from oxidation; therefore, the required bonding temperature can be decreased. Compared to direct Cu-Cu bonding, Cu/In bonding and Cu-Cu bonding with Ti passivation can be performed at low temperature, which can meet low thermal budget requirement for most devices. Besides, with the good electrical performance and reliability, these two bonded interconnects can be applied for 3D IC interconnects.
Keywords :
copper alloys; indium alloys; integrated circuit interconnections; oxidation; passivation; solidification; three-dimensional integrated circuits; titanium alloys; wafer bonding; 3D IC interconnects; Cu-Cu; Cu-Cu bonding; Cu-In; Cu-In bonding; Ti; Ti passivation; intermetallic compounds; isothermal solidification; oxidation; temperature 170 C; temperature 180 C; Adhesives; Materials; Nickel; Passivation; Resistance; Surface morphology;
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
Conference_Location :
Las Vegas, NV
Print_ISBN :
978-1-4799-0233-0
DOI :
10.1109/ECTC.2013.6575718