• DocumentCode
    628561
  • Title

    A novel and accurate methodology for design and characterization of wire-bond package performance for 5–10GHz applications

  • Author

    Mukherjee, Sayan ; Trombley, Django

  • Author_Institution
    Texas Instrum. Inc., Dallas, TX, USA
  • fYear
    2013
  • fDate
    28-31 May 2013
  • Firstpage
    1379
  • Lastpage
    1384
  • Abstract
    This paper presents novel and accurate design, simulation and measurement methodologies to characterize high-speed (5-10GHz) signal-path applications on standard Quad-Flat No-leads package (QFN) and Ball Grid Array (BGA) packages. The design of Integrated Circuit (IC) packages and Printed Circuit Boards (PCBs) for high-speed communication (10Gbps+ data-rates) enabling consumer applications is aggressively driven by performance focus while meeting Time-To-Market (TTM) schedules to gain competitive advantage in the market. As a result, such designs demand a carefully verified design strategy for incorporating standard packaging technologies (such as QFN packages) in the high-performance space. This requires going beyond design, simulation and measurement “best-practices” for first-pass success, given that there is little “marginality/specification headroom” available in the electrical performance of simple packaging technologies. Additionally, stringent TTM pressures present another constraint of having to achieve “first-pass system functionality” in a short design cycle. Such requirements of design performance and cycle time demand the need to establish novel design, simulation and characterization frameworks which is the main theme of this paper. Additionally, excellent model-to-hardware correlation has been demonstrated in the paper to establish the accuracy of the proposed modeling and characterization methodologies.
  • Keywords
    ball grid arrays; integrated circuit packaging; lead bonding; printed circuits; BGA packages; PCB; QFN packages; TTM schedule; ball grid array packages; frequency 5 GHz to 10 GHz; high-speed communication; integrated circuit packages; printed circuit boards; quad-flat no-leads package; time-to-market schedule; wire-bond package; Computational modeling; Correlation; Crosstalk; Probes; Solid modeling; Standards; Transmission line measurements;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
  • Conference_Location
    Las Vegas, NV
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4799-0233-0
  • Type

    conf

  • DOI
    10.1109/ECTC.2013.6575753
  • Filename
    6575753