• DocumentCode
    628563
  • Title

    PCB pin-field considerations for 40 Gb/s SerDes channels

  • Author

    Degerstrom, Michael J. ; Post, Devon J. ; Gilbert, B.K. ; Daniel, Erik S.

  • Author_Institution
    Mayo Clinic, Rochester, MN, USA
  • fYear
    2013
  • fDate
    28-31 May 2013
  • Firstpage
    1392
  • Lastpage
    1400
  • Abstract
    Designing pin-fields and related structures will be challenging for emerging 40 Gb/s electrically-based SerDes links. It is not known whether pin-fields implemented in conventional printed circuit board (PCB) technology will be capable of supporting these high data rates. We demonstrate through modeling and measurements that PCB pin-fields appear viable for data rates up to 40 Gb/s, provided that care is taken in the design.
  • Keywords
    integrated circuit design; integrated circuit measurement; integrated circuit modelling; printed circuit design; PCB pin-field consideration; PCB pin-field measurement; PCB pin-field modeling; PCB technology; SerDes channel; bit rate 40 Gbit/s; data rate; electrically-based SerDes links; pin-fields design; printed circuit board; Dielectrics; Insertion loss; Permittivity; Permittivity measurement; Sockets; Stripline;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
  • Conference_Location
    Las Vegas, NV
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4799-0233-0
  • Type

    conf

  • DOI
    10.1109/ECTC.2013.6575755
  • Filename
    6575755
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=628563