Glass carrier wafers for the silicon thinning process for stack IC applications

The performance of the temporary bond and debond process for wafer thinning is critical for 3D system integration. In the thinning process, the silicon wafer will be bonded face down to a carrier and then ground down to the desired thickness. After this process step, device wafer and carrier wafer will be separated again for additional downstream processing, such as separation and assembly. The work presented here will highlight the importance of high precision carriers and metrology techniques used to characterize and qualify these materials and, most importantly, the impact these have on the TTV of a bonded stack. The ability to leverage all of these tools to provide bonded stacks with extremely low TTV and impact on Si wafers after thinning operations will be demonstrated.