• DocumentCode
    628670
  • Title

    DC wander effect of DC blocking capacitors on PCIe Gen3 signal integrity

  • Author

    Na, Neil ; Dreps, D.M. ; Hejase, Jose A.

  • Author_Institution
    IBM Syst. & Technol. Group, Austin, TX, USA
  • fYear
    2013
  • fDate
    28-31 May 2013
  • Firstpage
    2063
  • Lastpage
    2068
  • Abstract
    This paper discusses the impact of DC wander also called baseline wander resulting from AC-coupling on signal integrity in receive waveforms in AC-coupled serial bus links with focus on PCIe Gen3 signaling. Receive signal behavior from charging and discharging activities of AC-coupling circuit is studied for fundamental understanding of baseline wander and its effect through simulations of short and long channels from various aspects of PCIe Gen3 signaling and high speed serial links in general.
  • Keywords
    capacitors; coupled circuits; peripheral interfaces; AC-coupled serial bus link circuit; DC baseline wander effect; DC blocking capacitor; PCIe Gen3 Signal Integrity; waveform receiver; Capacitance; Capacitors; Encoding; Propagation losses; Standards; Training; Voltage measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
  • Conference_Location
    Las Vegas, NV
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4799-0233-0
  • Type

    conf

  • DOI
    10.1109/ECTC.2013.6575863
  • Filename
    6575863