3D eWLB — Horizontal and vertical interconnects for integration of passive components

In this paper, we present simulation and measurement results of single-ended and differential vertical interconnections realized using the thin-film redistribution layer (RDL) and through encapsulant vias (TEVs) of the embedded wafer level ball grid array (eWLB) package. We demonstrate that the fan-out area of the eWLB can be used advantageous for the design of passive devices using TEV structures. We show simulation and measurement results of inductors and transformers built up by RDL and TEV structures. Thus, these structures are designed in the fan-out volume of the eWLB mold compound. We discuss the electrical performance of the 3D interconnections and embedded passives realized using TEVs. The presented examples demonstrate that the eWLB technology is an attractive candidate for system integration because this technology enables the design of 2D passives in RDL and 3D passives using RDL and TEV.