DocumentCode
629125
Title
Fully-depleted planar technologies and static RAM
Author
Hook, T. ; Cheng, K. ; Doris, B. ; Khakifirooz, A. ; Qing Liu ; Ponoth, S. ; Radens, Carl ; Vinet, M.
Author_Institution
IBM SRDC, Essex Junction, VT, USA
fYear
2013
fDate
11-13 June 2013
Abstract
Key elements of FDSOI (Fully Depleted Silicon on Insulator) technology as applied to SRAMs are described. Thick- and thin-Bottom Oxide (BOX) variants are discussed.
Keywords
SRAM chips; elemental semiconductors; silicon; transistors; BOX; FDSOI; Si; fully depleted silicon on insulator technology; fully-depleted planar technology; planar fully-depleted transistor; static RAM; thick-bottom oxide variant; thin-bottom oxide variant; Doping; Logic gates; Random access memory; Silicon; Threshold voltage; Transistors; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology (VLSIT), 2013 Symposium on
Conference_Location
Kyoto
ISSN
0743-1562
Print_ISBN
978-1-4673-5226-0
Type
conf
Filename
6576624
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