Mechanisms of low-energy operation of XCT-SOI CMOS devices — Prospect of sub-20-nm regime

Author

Omura, Y. ; Sato, Daisuke

Author_Institution

Grad. Sch. of Sci. & Eng., Kansai Univ. ORDIST, Suita, Japan

fYear

2013

fDate

20-21 June 2013

Firstpage

1

Lastpage

4

Abstract

This paper describes the performance prospect of scaled cross-current tetrode (XCT) CMOS devices and demonstrates the outstanding low-energy aspects of XCT-SOI CMOS by analyzing device operations. The low-energy operation of scaled XCT CMOS circuits stems from the `source potential floating effect´, which offers the dynamic reduction of effective gate capacitance. It is expected that this feature will be very important in many medical implant applications that demand long device lifetimes without recharging the battery.

Keywords

CMOS integrated circuits; capacitance; low-power electronics; silicon-on-insulator; XCT-SOI CMOS device; effective gate capacitance dynamic reduction; low-energy operation mechanisms; scaled cross-current tetrode; source potential floating effect; CMOS integrated circuits; Erbium; Integrated circuit modeling; Junctions; Logic gates; MOSFET; Semiconductor device modeling; MOSFET; SOI; XCT-SOI MOSFET; low energy; medical applications; quasi-static body floating effect; source potential floating effect;

fLanguage

English

Publisher

ieee

Conference_Titel

Faible Tension Faible Consommation (FTFC), 2013 IEEE

Conference_Location

Paris

Print_ISBN

978-1-4673-6105-7

Type

conf

DOI

10.1109/FTFC.2013.6577747

Filename

6577747