DocumentCode
629974
Title
A 720µW 873MHz–1.008GHz injection-locked frequency multiplier with 0.3V supply voltage in 90nm CMOS
Author
Lechang Liu ; Ishikawa, Kenji ; Kuroda, Tadahiro
Author_Institution
Keio Univ., Yokohama, Japan
fYear
2013
fDate
12-14 June 2013
Abstract
A 0.3V parametric resonance based sub-GHz injection-locked frequency multiplier is developed in 90nm CMOS. This is the first reported variation-tolerant frequency multiplier with 0.3V supply voltage. It achieves 720μW power consumption and -110dBc@600kHz phase noise with the lowest supply voltage in state-of-the-art frequency synthesizers.
Keywords
CMOS integrated circuits; UHF integrated circuits; frequency multipliers; frequency synthesizers; CMOS; frequency 873 MHz to 1.008 MHz; frequency synthesizers; parametric resonance; phase noise; power 720 muW; power consumption; size 90 nm; sub-GHz injection-locked frequency multiplier; variation-tolerant frequency multiplier; voltage 0.3 V; CMOS integrated circuits; Frequency measurement; Frequency modulation; Frequency synthesizers; Phase noise; Resonant frequency; Varactors;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits (VLSIC), 2013 Symposium on
Conference_Location
Kyoto
Print_ISBN
978-1-4673-5531-5
Type
conf
Filename
6578639
Link To Document