Title :
93% power reduction by automatic self power gating (ASPG) and multistage inverter for negative resistance (MINR) in 0.7V, 9.2µW, 39MHz crystal oscillator
Author :
Iguchi, Shoji ; Saito, Akihiro ; Yunfei Zheng ; Watanabe, K. ; Sakurai, Takayasu ; Takamiya, Makoto
Author_Institution :
Univ. of Tokyo, Tokyo, Japan
Abstract :
In order to reduce the power consumption of a crystal oscillator (XO), an automatic self power gating (ASPG) and a multistage inverter for a negative resistance (MINR) are proposed. By combining ASPG and MINR, the measured power of a 39-MHz XO in 40-nm CMOS decreases by 93% from 139μW to 9.2μW, which is the lowest power in the published XO´s at 0.7V.
Keywords :
CMOS integrated circuits; VHF oscillators; crystal oscillators; invertors; low-power electronics; power consumption; ASPG; MINR; automatic self power gating; crystal oscillator; frequency 39 MHz; multistage inverter for a negative resistance; power 139 muW; power 9.2 muW; power consumption; size 40 nm; voltage 0.7 V; Crystals; Inverters; Oscillators; Power demand; Resistance; Switches;
Conference_Titel :
VLSI Circuits (VLSIC), 2013 Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4673-5531-5
