DocumentCode :
631384
Title :
Pre-processing power traces with a phase-sensitive detector
Author :
Hodgers, P. ; Hanley, Neil ; O´Neill, Maire
Author_Institution :
Centre for Secure Inf. Technol., Queens Univ. Belfast, Belfast, UK
fYear :
2013
fDate :
2-3 June 2013
Firstpage :
131
Lastpage :
136
Abstract :
As cryptographic implementations are increasingly subsumed as functional blocks within larger systems on chip, it becomes more difficult to identify the power consumption signatures of cryptographic operations amongst other unrelated processing activities. In addition, at higher clock frequencies, the current decay between successive processing rounds is only partial, making it more difficult to apply existing pattern matching techniques in side-channel analysis. We show however, through the use of a phase-sensitive detector, that power traces can be pre-processed to generate a filtered output which exhibits an enhanced round pattern, enabling the identification of locations on a device where encryption operations are occurring and also assisting with the re-alignment of power traces for side-channel attacks.
Keywords :
cryptography; phase detectors; system-on-chip; clock frequency; cryptographic implementation; encryption operation; matching technique; phase-sensitive detector; power consumption signature; pre-processing power tracing; round pattern enhancement; side-channel analysis; systems on chip; cartography; phase-sensitive detector; side-channel attack;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Hardware-Oriented Security and Trust (HOST), 2013 IEEE International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4799-0559-1
Type :
conf
DOI :
10.1109/HST.2013.6581578
Filename :
6581578
Link To Document :
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