Title :
GaP source-drain vertical transistor on bulk silicon for 1-transistor DRAM application
Author :
Pal, Arnab ; Saraswat, Krishna C. ; Nainani, Aneesh ; Zhiyuan Ye ; Xinyu Bao ; Sanchez, E.
Author_Institution :
Center of Integrated Syst., Stanford Univ., Stanford, CA, USA
Abstract :
GaP is proposed as source and drain material for 1-transistor DRAM application as it is nearly lattice matched to silicon and provides a valence band offset of ~ 1 eV. Simulations of retention time for the proposed vertical structure indicate: large improvement over similar bulk silicon devices, ability to meet ITRS requirement and good scalability. An MOCVD recipe is optimized for GaP growth on silicon and further characterized by fabricating electrical devices such as diodes and transistors indicating feasibility for usage in 1T-DRAM technology.
Keywords :
DRAM chips; III-V semiconductors; MOCVD; MOSFET; elemental semiconductors; gallium compounds; semiconductor diodes; silicon; 1-transistor DRAM application; 1T-DRAM technology; GaP; GaP growth; ITRS requirement; MOCVD recipe; Si; bulk silicon devices; diodes; electrical devices; source-drain vertical transistor; valence band offset; vertical structure; Logic gates; MOCVD; Random access memory; Rough surfaces; Silicon; Transistors;
Conference_Titel :
Memory Workshop (IMW), 2013 5th IEEE International
Conference_Location :
Monterey, CA
Print_ISBN :
978-1-4673-6168-2
DOI :
10.1109/IMW.2013.6582132