• DocumentCode
    632912
  • Title

    Design and implementation of SDR based QPSK modulator on FPGA

  • Author

    Kazaz, Tarik ; Kulin, Merima ; Hadzialic, Mesud

  • Author_Institution
    Fac. of Electr. Eng., Univ. of Sarajevo, Sarajevo, Bosnia-Herzegovina
  • fYear
    2013
  • fDate
    20-24 May 2013
  • Firstpage
    513
  • Lastpage
    518
  • Abstract
    Software defined radio (SDR) technology enables implementation of wireless devices that support multiple air-interfaces and modulation formats, which is very important if consider proliferation of wireless standards. To enable such functionality SDR is using reconfigurable hardware platform such as Field Programmable Gate Array (FPGA). In this paper, we present design procedure and implementation result of SDR based QPSK modulator on Altera Cyclone IV FPGA. For design and implementation of QPSK modulator we used Altera DSP Builder Tool combined with Matlab/Simulink, Modelsim and Quartus II design tools. As reconfigurable hardware platform we used Altera DE2-115 development and education board with AD/DA daughter card. Software and Hardware-in-the-loop (HIL) simulation was conducted before hardware implementation and verification of designed system. This method of design makes implementation of SDR based modulators simpler ad faster.
  • Keywords
    analogue-digital conversion; digital-analogue conversion; field programmable gate arrays; modulation; quadrature phase shift keying; reconfigurable architectures; software radio; AD-DA daughter card; Altera Cyclone IV FPGA; Altera DE2-115 development; Altera DSP builder tool; Hardware-in-the-loop simulation; Matlab-Simulink; Modelsim design tools; Quartus II design tools; SDR-based QPSK modulator; field programmable gate array; modulation formats; multiple air-interfaces; reconfigurable hardware platform; software defined radio technology; wireless devices; wireless standard proliferation; Clocks; Digital signal processing; Field programmable gate arrays; Hardware; Phase shift keying; Software packages; DSP Builder; FPGA; NCO; QPSK; RRC; SDR;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information & Communication Technology Electronics & Microelectronics (MIPRO), 2013 36th International Convention on
  • Conference_Location
    Opatija
  • Print_ISBN
    978-953-233-076-2
  • Type

    conf

  • Filename
    6596313