DocumentCode :
6330
Title :
Electrical Properties of p-type 3C-SiC/Si Heterojunction Diode Under Mechanical Stress
Author :
Qamar, Asif ; Tanner, Philip ; Dzung Viet Dao ; Hoang-Phuong Phan ; Dinh, Toan
Author_Institution :
Queensland Micro-Nanotechnol. Centre, Griffith Univ., Griffith, NSW, Australia
Volume :
35
Issue :
12
fYear :
2014
fDate :
Dec. 2014
Firstpage :
1293
Lastpage :
1295
Abstract :
The current mechanism and effects of external transverse stress in the [110] orientation on the electrical properties of a single crystal (100) p-3C-SiC/p-Si heterojunction diode are reported for the first time. It has been observed that the current flow in the heterojunction is due to tunneling through the triangular potential barrier formed due to valence band offset between Si and SiC. The applied stress produces small changes in tunneling current when stress is increased from 0 to 308 MPa. The observed increase in current at 0.24 V is 10% at maximum stress of 308 MPa. The increase of tunneling current when applying stress is explained in terms of stress, which alters the out-of-plane effective mass, and the effective tunneling barrier height of holes in top subbands of p-type Si.
Keywords :
elemental semiconductors; semiconductor diodes; semiconductor heterojunctions; silicon; silicon compounds; wide band gap semiconductors; Si; SiC; current flow; effective tunneling barrier height; electrical properties; external transverse stress; heterojunction diode; mechanical stress; triangular potential barrier; tunneling current; valence band offset; voltage 0.24 V; Heterojunctions; Piezoresistance; Silicon; Silicon carbide; Stress; Substrates; Tunneling; p-type 3C-SiC/Si heterojunction; strain induced effects; strain induced effects.; tunneling current;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2014.2361359
Filename :
6932451
Link To Document :
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