Parallel implementation of the Ant Colony System algorithm for automated combinational logic circuits design using CUDA architecture

This paper propose parallel implementation of Ant Colony System (ACS) algorithm for automated combinational circuit design. Ant Colony System is one of the most popular and widely used Ant Colony Optimization (ACO) algorithm and heuristic algorithm in general. As digital logic circuits become more complex, efficient circuit design is priority and use of heuristic methods are unavoidable. Unfortunately, the optimization problems became so complex in sense of their size, even the most powerful heuristic algorithms can´t solve them on single CPU. In order to be able to tackle the problem, parallel version of ACS is needed and this paper presents CUDA (Compute Unified Device Architecture) C language implementation.