DocumentCode
633202
Title
Optimizing interdigital electrode spacing of CMOS APD for 10 Gb/s application
Author
Shimotori, Toshiyuki ; Maekita, Kazuaki ; Gyobu, Ryoichi ; Maruyama, Tetsuhiro ; Iiyama, Koichi
Author_Institution
Div. of Electr. & Comput. Eng., Kanazawa Univ., Ishikawa, Japan
fYear
2013
fDate
June 30 2013-July 4 2013
Firstpage
1
Lastpage
2
Abstract
Silicon avalanche photodiodes (APD) fabricated by 0.18 μm CMOS process with different interdigital electrode spacing were characterized at 850 nm wavelength. The largest bandwidth of 7 GHz was achieved for the APD with 1 μm electrode spacing, and the gain-bandwidth product was 270 GHz.
Keywords
CMOS integrated circuits; avalanche photodiodes; elemental semiconductors; optical fabrication; silicon; CMOS APD; Si; bit rate 10 Gbit/s; frequency 270 GHz; frequency 7 GHz; gain-bandwidth product; interdigital electrode spacing; silicon avalanche photodiodes; size 0.18 mum; wavelength 850 nm; Bandwidth; CMOS process; Electrodes; Gain; Photonics; Silicon; Standards;
fLanguage
English
Publisher
ieee
Conference_Titel
OptoElectronics and Communications Conference held jointly with 2013 International Conference on Photonics in Switching (OECC/PS), 2013 18th
Conference_Location
Kyoto
Type
conf
Filename
6597336
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