DocumentCode :
634638
Title :
Increasing fault coverage during functional test in the operational phase
Author :
De Carvalho, M. ; Bernardi, P. ; Sanchez, E. ; Sonza Reorda, M. ; Ballan, O.
Author_Institution :
DAUIN - Politec. di Torino Torino (TO), Turin, Italy
fYear :
2013
fDate :
8-10 July 2013
Firstpage :
43
Lastpage :
48
Abstract :
A key issue in many safety-critical applications is the test of the ICs to be performed during the operational phase: regulations and standards often explicitly describe fault coverage figures to be achieved. Functional test (i.e., a test exploiting only functional inputs and outputs, without resorting to any Design for Testability) is often the only viable solution, unless a strict cooperation exists between the system company and the device provider. However, purely functional test often shows several limitations due to the limited accessibility that it can gain on some input/output signals. This paper proposes a hybrid approach, in which a suitable hardware module is added outside a microcontroller to increase its functional testability during the operational phase. Experimental results gathered on a couple of cases-of-study are reported, showing the feasibility of the method.
Keywords :
fault tolerant computing; integrated circuit testing; logic testing; microcontrollers; IC testing; fault coverage; functional testability; hardware module; hybrid approach; input-output signals; microcontroller; operational phase; safety-critical applications; Circuit faults; Clocks; Hardware; Microcontrollers; Pins; Registers; Testing; Functional test; SBST; automotive systems; on-line test; safety-critical systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
On-Line Testing Symposium (IOLTS), 2013 IEEE 19th International
Conference_Location :
Chania
Type :
conf
DOI :
10.1109/IOLTS.2013.6604049
Filename :
6604049
Link To Document :
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