Title :
Exploiting application resiliency for energy-efficient and adequately-reliable operation
Author :
Karakonstantis, Georgios ; Atienza, David ; Burg, Andreas
Author_Institution :
EPFL, Lausanne, Switzerland
Abstract :
Summary form only given. Currently, manufacturers go to great lengths for mitigating the effects of parametric variations and scaled supply voltages by adopting conservative layout rules and by introducing several mechanisms providing redundancy on various layers of design abstraction. Such measures may have accomplished to hide any inaccurate behavior of nanometer circuits from the application layers and maintain acceptable yield levels, but unfortunately the large energy, performance, and area overheads that they incur limit their viability, especially as we move beyond the 45nm node. Such a reality has urged us to rethink the current design flows and question if such considerable overhead is really required given that many modern signal-processing workloads such as in multimedia, communications, or biomedical systems are inherently complexity/energy-scalable and can even tolerate a degree of imprecision in their computations and stored data. By taking advantage of this inherent resilience of many applications and trading off output precision and quality of service we could reduce energy usage and reliability costs, since by allowing some computations to be approximate we can alleviate the burden of correctness overhead imposed by the traditional design paradigm. In this paper, we discuss methods that could reveal and exploit the resilience and certain characteristics of biomedical and communication applications for achieving adequately-reliable and energy efficient operation, while limiting or even avoiding the penalties required by traditional approaches.
Keywords :
energy conservation; integrated circuit layout; integrated circuit reliability; nanoelectronics; performance evaluation; power aware computing; quality of service; redundancy; application layers; application resiliency; biomedical applications; communication applications; complexity-scalable workloads; design abstraction layers; design flows; energy usage reduction; energy-efficient reliable operation; energy-scalable workloads; layout rules; multimedia application; nanometer circuits; output precision; parametric variations effect mitigation; quality of service; redundancy; reliability cost reduction; scaled supply voltage effect mitigation; signal-processing workloads; yield levels; Energy efficiency; Layout; Redundancy; Reliability engineering; Resilience; Voltage control;
Conference_Titel :
On-Line Testing Symposium (IOLTS), 2013 IEEE 19th International
Conference_Location :
Chania
DOI :
10.1109/IOLTS.2013.6604093