DocumentCode
634726
Title
Reconfigurable platforms for Data Processing on scientific space instruments
Author
Bubenhagen, Frank ; Fiethe, Bjorn ; Lange, Tobias ; Michalik, Harald ; Michel, Holger
Author_Institution
Inst. of Comput. & Network Eng. (IDA), Tech. Univ. Braunschweig, Braunschweig, Germany
fYear
2013
fDate
24-27 June 2013
Firstpage
63
Lastpage
70
Abstract
The demand for increasing on-board processing power and reconfigurability is the driver for new approaches in the development of Data Processing Units (DPUs) for scientific instruments for upcoming and future space missions. The central part of a DPU is the actual processing element which has to reduce the raw data generated by the sensors to a down-linkable size with scientific meaningful content. With increasing raw data rates also more powerful, energy efficient and adaptable processing cores are required. Apparently, this can not be achieved by simple data compression but requires the execution of complex scientific algorithms - formerly a task for powerful commercial workstations on earth. Space qualified General Purpose Processors (GPPs) are not sufficient for such tasks, but with space qualified SRAM-based FPGAs (Field Programmable Gate Arrays) a technology is available and used within today´s and upcoming processing platforms. The development challenges are to exploit the reconfigurability features of such devices in-flight, considering the harsh space environment. A feasible architecture is demonstrated with the Dynamically Reconfigurable Processing Module (DRPM) in the frame of an ESA study and currently adapted for the DPU within the Solar Orbiter PHI instrument. The demand for more computation power drives also recent developments of new qualified Many-Core processing cores, which will naturally provide also new options for future DPU architectures.
Keywords
aerospace computing; aerospace instrumentation; artificial satellites; computerised instrumentation; data handling; field programmable gate arrays; DRPM; GPP; Solar Orbiter PHI instrument; data compression; data processing core; data processing unit; dynamically reconfigurable processing module; field programmable gate array; many-core processing core; reconfigurable platform; scientific space instrument; space mission; space qualified SRAM-based FPGA; space qualified general purpose processors; static random access memory; Aerospace electronics; Digital signal processing; Field programmable gate arrays; Hardware; Instruments; Performance evaluation; Program processors;
fLanguage
English
Publisher
ieee
Conference_Titel
Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on
Conference_Location
Torino
Type
conf
DOI
10.1109/AHS.2013.6604227
Filename
6604227
Link To Document