SAT based low power binding to reduce switching activity

The call for low power consumption has necessitated a paradigm shift with respect to circuit designing in which minimizing power consumption is as important as optimizing performance and area. A SAT based approach which targets operation scheduling and binding simultaneously and produces a circuit which consumes low power is proposed in this paper. The focus of this work is on reducing switching activity in dynamic power, especially with functional module binding. The resource constrained scheduling is formulated as a satisfiability problem (SAT) and a PB-SAT solver is used for finding the optimal binding that minimizes the overall power consumption due to switching activity.