Influence of delay mismatch on digital predistortion for power amplifiers

Power amplifier is an essential component in communication systems. Digital baseband predistortion is a cost effective approach to linearize a power amplifier. Linearization of the power amplifiers is done by using a digital predistortion calculated from a pair of time aligned signals. In the indirect approach of calculating the predistortion, these two signals are input and output of the power amplifier converted to baseband. This paper analyzes the influence of the accuracy of the timing of these signals on the performance of the predistorter. We consider the case of an integer and a fractional lag (less than the sampling period). We show that for a predistorter without memory, even for a very small fractional offset degrades performance very significantly. The introduction of memory in the predistorter compensates for the imperfect synchronization. The experiments are performed on data measured on a Doherty power amplifier for UHF DVB-T TV broadcasting. Therefore the method is evaluated on real measured power amplifier.