Title :
Parallel flow-sensitive pointer analysis by graph-rewriting
Author :
Nagaraj, Vaivaswatha ; Govindarajan, R.
Author_Institution :
Indian Institute of Science, Bangalore, India
Abstract :
The following topics are dealt with: power and energy; GPU; memory system management; runtime and scheduling; caches; memory hierarchy; debugging; network-on-chip; microarchitecture; and compiler optimization.
Keywords :
graphics processing units; memory architecture; network-on-chip; optimising compilers; parallel architectures; power aware computing; processor scheduling; program debugging; storage management; GPU; caches; compiler optimization; debugging; memory hierarchy; memory system management; microarchitecture; network-on-chip; parallel architecture; runtime; scheduling; amorphous data-parallelism; flow-sensitive pointer analysis; graph-rewriting; staged flow sensitive pointer analysis;
Conference_Titel :
Parallel Architectures and Compilation Techniques (PACT), 2013 22nd International Conference on
Conference_Location :
Edinburgh
Print_ISBN :
978-1-4799-1018-2
DOI :
10.1109/PACT.2013.6618793
