• DocumentCode
    63982
  • Title

    Power-efficient, PVT robust conductance cancellation method for gain enhancement

  • Author

    Huang, Bo ; Chen, D.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
  • Volume
    49
  • Issue
    16
  • fYear
    2013
  • fDate
    Aug. 1 2013
  • Firstpage
    982
  • Lastpage
    984
  • Abstract
    A power-efficient, process, voltage and temperature (PVT) robust gds cancellation method for gain enhancement is proposed. The method generates a negative conductance, which matches and cancels the positive conductance. This makes the gds cancellation method effective over process and wide temperature variation without the aid of external calibration or a tuning circuit. The method senses signals from cascode nodes instead of output nodes, making the method insensitive to output voltage swing. The simulation results of an example implementation in IBM 0.13 μm process show at least 22 dB DC gain enhancement over all process corners and temperatures ranging from - 20 to 80°C, with less than 9% power consumption overhead.
  • Keywords
    calibration; circuit tuning; network analysis; IBM process; cascode nodes; external calibration; gain enhancement; output voltage swing; positive conductance cancellation; power consumption overhead; power-efficient PVT robust conductance cancellation method; power-efficient process-voltage and temperature robust cancellation method; size 0.13 mum; temperature -20 degC to 80 degC; temperature variation; tuning circuit;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2013.0705
  • Filename
    6571483