DocumentCode :
641344
Title :
Nanowire field-programmable computing platform
Author :
Khasanvis, Santosh ; Rahman, Mosaddequr ; Shabadi, Prasad ; Narayanan, Pritish ; Hyung Suk Yu ; Chi On Chui ; Moritz, Csaba Andras
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA
fYear :
2013
fDate :
15-17 July 2013
Firstpage :
23
Lastpage :
25
Abstract :
A nanowire-based field-programmable computing platform is presented featuring intrinsic fine-grained device-level reconfiguration without emulation (i.e. no look-up tables involved) using programmable cross-nanowire transistors, and regular physical implementation with relaxed manufacturing requirements at nanoscale. This approach can potentially provide orders of magnitude benefits in terms of area, power and performance vs. scaled CMOS FPGA at lower cost.
Keywords :
CMOS logic circuits; field effect transistors; field programmable gate arrays; nanowires; intrinsic fine-grained device-level reconfiguration; nanowire field-programmable computing platform; reconfigurable architecture; scaled CMOS FPGA; Field programmable gate arrays; Logic gates; Nanoscale devices; Programming; Routing; Tiles; Transistors; nanowires; programmable FETs; reconfigurable architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanoscale Architectures (NANOARCH), 2013 IEEE/ACM International Symposium on
Conference_Location :
Brooklyn, NY
Print_ISBN :
978-1-4799-0873-8
Type :
conf
DOI :
10.1109/NanoArch.2013.6623032
Filename :
6623032
Link To Document :
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