Energy efficient computing using coupled Dual-Pillar Spin Torque Nano Oscillators

We present a Dual-Pillar Spin-Torque Nano Oscillator (DP-SNTO) suitable for energy-efficient information processing. The proposed DP-STNO consists of a low resistance Giant Magneto-Resistance (GMR) path that allows ultra-low voltage biasing of the oscillating ferromagnetic-free-layer, and a high resistance Tunneling Magneto-Resistance (TMR) path that provides amplified RF-signal and facilitates easy sensing mechanism. The free-layers of multiple DP-STNOs can be coupled using spin-wave (or electrical coupling) to accomplish complex signal processing tasks, like image-segmentation, with high energy-efficiency. Simulations show that DP-STNO can be ~50× more energy-efficient as compared to a standard two-terminal STNO and can hence be more suitable for integration with CMOS for non-Boolean computing and RF-signaling applications.