DocumentCode :
641790
Title :
Cache-optimized implemention of long sequences FFT on TS201
Author :
Gao Lining ; Ma Xiao ; Yuan Yuan ; Pang Fengqian
Author_Institution :
Radar Res. Lab., Beijing Inst. of Technol., Beijing, China
fYear :
2013
fDate :
14-16 April 2013
Firstpage :
1
Lastpage :
5
Abstract :
This paper proposes an improved method for Winograd algorithm, aiming to solve the problem that the existing methods of long sequences Fast Fourier Transform (FFT) on the TS201 processor doesn´t take full account of the Cache´s miss influence on efficiency. The new method makes maximum use of the Cache´s advantages in reading and writing by optimizing the access method of rows and columns to avoid three explicitly matrix transposition, and hiding the twiddle factor multiplication by reconfiguration butterfly computation. Test results show that the performance of Cache-Optimized Implementation of FFT has been significantly improved.
Keywords :
DRAM chips; cache storage; circuit optimisation; fast Fourier transforms; DRAM; TS201 processor; Winograd algorithm; access method optimization; cache miss influence; cache-optimized implementation; fast Fourier transform; long sequences FFT; reading; reconfiguration butterfly computation; twiddle factor multiplication; writing; Cache-optimized; Long Sequences FFT; TS201; Winograd algorithm;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Radar Conference 2013, IET International
Conference_Location :
Xi´an
Electronic_ISBN :
978-1-84919-603-1
Type :
conf
DOI :
10.1049/cp.2013.0378
Filename :
6624542
Link To Document :
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